Role Brief:
Our client, an exciting AI Hardware Start-Up is looking for an experienced RTL/ASIC Design Engineer to join their team to help write micro-architecture specifications as well as drive chips from product definition to production.
Skillset:
· BS/MS degree with 10 years of RTL Design Experience.
· Strong background with Synthesis, STA, CDC, Lint.
· Proficient using System Verilog.
· Previous Micro-architecture experience.
· Preferred: Background with PCIe/CXL protocols.
Company Benefits:
· $180k-$220k Base Salary
· Equity
· 401K
· Full Healthcare
· Fast Paced Working Environment
· Opportunity to work on the latest technology
This an exciting opportunity to join an exciting Semiconductor company helping to drive advancements in the latest technology. If you are looking for an opportunity that will provide you with career progression within a successful team, then this is one for you.
Location: San Jose, CA
